igpu_description.h

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/***************************************************************************************************
 * Copyright 2023 NVIDIA Corporation. All rights reserved.
 **************************************************************************************************/
 
#ifndef MI_NEURAYLIB_IGPU_DESCRIPTION_H
#define MI_NEURAYLIB_IGPU_DESCRIPTION_H
 
#include <mi/base/interface_declare.h>
 
namespace mi {
 
namespace neuraylib {
 
class IGpu_description : public
    mi::base::Interface_declare<0x1e2e02ff,0xf083,0x4a12,0xb7,0xda,0x02,0x58,0xb6,0xd0,0x04,0x75>
{
public:
    virtual Uint32 get_id() const = 0;
 
    virtual const char* get_name() const = 0;
 
    virtual Sint64 get_memory_size() const = 0;
 
    virtual bool get_tcc_flag() const = 0;
 
    virtual Sint32 get_cuda_device_id() const = 0;
 
    virtual Sint32 get_cuda_compute_capability_major() const = 0;
 
    virtual Sint32 get_cuda_compute_capability_minor() const = 0;
 
    virtual Sint32 get_clock_rate() const = 0;
 
    virtual Sint32 get_multi_processor_count() const = 0;
 
    virtual Sint32 get_pci_bus_id() const = 0;
 
    virtual Sint32 get_pci_device_id() const = 0;
 
    virtual bool is_attached_to_display() const = 0;
 
    virtual bool get_optimus_flag() const = 0;
};
 // end group mi_neuray_configuration
 
} // namespace neuraylib
 
} // namespace mi
 
#endif // MI_NEURAYLIB_IGPU_DESCRIPTION_H