irendering_configuration.h

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/***************************************************************************************************
 * Copyright 2024 NVIDIA Corporation. All rights reserved.
 **************************************************************************************************/
 
#ifndef MI_NEURAYLIB_IRENDERING_CONFIGURATION_H
#define MI_NEURAYLIB_IRENDERING_CONFIGURATION_H
 
#include <mi/base/interface_declare.h>
#include <mi/base/enum_util.h>
#include <mi/neuraylib/irender_target.h>
 
namespace mi {
 
class IArray;
class IString;
class IStructure;
 
namespace neuraylib {
 
class IGpu_description;
 
class ILpe_check_result : public
    mi::base::Interface_declare<0xec3bc890,0x4ea8,0x4465,0x9e,0x83,0xd8,0x41,0xa8,0xb4,0x77,0x94>
{
public:
    virtual Size get_messages_length() const = 0;
 
    virtual Size get_index( Size i) const = 0;
 
    virtual bool get_color_expression_flag( Size i) const = 0;
 
    virtual Size get_position( Size i) const = 0;
 
    virtual const char* get_message( Size i) const = 0;
};
 
class ILpe_analysis_result : public
    mi::base::Interface_declare<0xec3bc890,0x4ea8,0x4465,0x9e,0x83,0xd8,0x41,0xa8,0xb4,0x77,0x95,
    ILpe_check_result>
{
public:
    virtual Size get_color_classification_count() const = 0;
 
    virtual Size get_alpha_classification_count() const = 0;
 
    virtual Size get_overlap_count() const = 0;
 
    virtual bool get_color_overlap_flag( Size i) const = 0;
 
    virtual bool get_overlap_indices( Size i, Size& o1, Size& o2) const = 0;
 
    virtual bool get_overlap_expressions( Size i, const char*& lpe1, const char*& lpe2) const = 0;
};
 
class IRendering_configuration : public
    mi::base::Interface_declare<0x8e148c6e,0x3515,0x4368,0xba,0xb7,0x97,0xfd,0x26,0x35,0xbb,0x91>
{
public:
 
 
    virtual Sint32 add_mdl_path( const char* path) = 0;
 
    virtual Sint32 remove_mdl_path( const char* path) = 0;
 
    virtual void clear_mdl_paths() = 0;
 
    virtual Size get_mdl_paths_length() const = 0;
 
    virtual const IString* get_mdl_path( Size index) const = 0;
 
 
 
    virtual Sint32 add_resource_path( const char* path) = 0;
 
    virtual Sint32 remove_resource_path( const char* path) = 0;
 
    virtual void clear_resource_paths() = 0;
 
    virtual Size get_resource_paths_length() const = 0;
 
    virtual const IString* get_resource_path( Size index) const = 0;
 
 
 
    virtual Sint32 add_include_path( const char* path) = 0;
 
    virtual Sint32 remove_include_path( const char* path) = 0;
 
    virtual void clear_include_paths() = 0;
 
    virtual Size get_include_paths_length() const = 0;
 
    virtual const IString* get_include_path( Size index) const = 0;
 
    virtual Sint32 add_custom_attribute_filter(const char* name_pattern) = 0;
 
    virtual Sint32 remove_custom_attribute_filter(const char* name_pattern) = 0;
 
    virtual void clear_custom_attribute_filters() = 0;
 
    virtual Size get_custom_attribute_filter_length() const = 0;
 
    virtual const char* get_custom_attribute_filter(Size index) const = 0;
 
 
 
    virtual Uint32 get_renderers_length() const = 0;
 
    virtual const char* get_renderer( Uint32 index) const = 0;
 
    virtual Sint32 set_renderer_option( const char* name, const char* value) = 0;
 
    virtual const IString* get_renderer_option( const char* name) const = 0;
 
 
    static const Uint32 CPU = 0xffffffff;
 
    static const Uint32 ALL_GPUS = 0xfffffffe;
 
    static const Uint32 ALL_HOSTS = 0xfffffffd;
 
    static const Uint32 LOCAL_HOST = 0;
 
 
 
    virtual Sint32 set_gpu_enabled( bool value) = 0;
 
    virtual bool get_gpu_enabled() const = 0;
 
    virtual Sint32 set_cpu_fallback_enabled( bool value) = 0;
 
    virtual bool get_cpu_fallback_enabled() const = 0;
 
    virtual Sint32 set_driver_version_check_enabled( bool value) = 0;
 
    virtual bool get_driver_version_check_enabled() const = 0;
 
    virtual Uint32 get_highest_gpu_id( Uint32 host_id = 0) = 0;
 
    virtual const IGpu_description* get_gpu_description( Uint32 gpu_id, Uint32 host_id = 0) = 0;
 
    virtual Sint32 set_resource_enabled(
        Uint32 resource_id, Uint32 host_id, const char* render_mode, bool enable) = 0;
 
    virtual Sint32 get_resource_enabled(
        Uint32 resource_id, Uint32 host_id, const char* render_mode, bool& enable) = 0;
 
 
    enum Alpha_mode {
       ALPHA_PRIMARY           = 0x00u,
       ALPHA_TRANSMIT          = 0x01u,
       ALPHA_TRANSMIT_SPECULAR = 0x02u,
       ALPHA_NONE              = 0x03u,
 
       ALPHA_MODE_MASK         = 0x0fu,
 
       ALPHA_MATTE_SHADOW      = 0x10u,
 
       //  Undocumented, for alignment only
       ALPHA_MODE_FORCE_32_BIT = 0xffffffffU
    };
 
 
 
    virtual const ILpe_check_result* check_light_path_expressions(
        const IArray* expressions) const = 0;
 
    virtual const IStructure* extract_light_path_expressions_from_name(
        const char* canvas_name) const = 0;
 
    virtual const IString* make_alpha_expression( Alpha_mode alpha_mode) const = 0;
 
    virtual const IString* make_alpha_mask_expression(
        const IArray* labels, bool exclude, Alpha_mode alpha_mode) const = 0;
 
    virtual const IString* make_color_mask_expression(
        const IArray* labels, bool exclude) const = 0;
 
    virtual const ILpe_analysis_result* analyze_light_path_expressions(
        const IArray* expressions) const = 0;
 
 
    virtual ICanvas_parameters* map_canvas_name(const char* name) const = 0;
 
    virtual IString* map_canvas_parameters(const ICanvas_parameters*) const = 0;
 
    virtual const char* map_canvas_type(Canvas_type) const = 0;
};
 
mi_static_assert( sizeof( IRendering_configuration::Alpha_mode) == sizeof( Uint32));
(IRendering_configuration::Alpha_mode);
 // end group mi_neuray_configuration
 
} // namespace neuraylib
 
} // namespace mi
 
#endif // MI_NEURAYLIB_IRENDERING_CONFIGURATION_H